| IP.com Number | IPCOM000131956D |
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| Dated | Nov 23, 2005 UTC | ||
| Size | 2 page(s) (0.65 MB) | ||
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| Country | United States |
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| Language | English (United States) |
| Related Person(s) |
(AUTHOR) Narendra Kumar (AUTHOR) Joshua Lee |
| Copyright | ©Motorola, Inc 11/23/05 |
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by Narendra Kumar & Joshua Lee
Achieving high efficiency across power level in RF PA transmitter design is really challenging. This paper proposes a new concept in achieving constant high efficiency. The technique is to control the load impedance to obtain wider dynamic range over power level with simple impedance tuning (load modulation) in stage bypassing scheme. In other words, to achieve high PA efficiency across power level, saturation point of the power level must be controlled by adjusting the load impedance.
Introduction
Maximum efficiency is obtained operating at saturation region. Hence, at lower power level (under back off condition), the efficiency is lower as shown in Figure 1. Therefore, at low power, optimum load impedance and quiescent drain bias are major design elements to achieve high efficiency.
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Figure 1: PA efficiency characteristics
Achieving constant efficiency for wider dynamic range of power level requires a supply or load adjustment method. Load adjustment method to achieve constant efficiency across power level is shown in Figure 2. For any power level, saturation point can be maintained by switching the load impedance to the right value.
Figure 2: Constant efficiency with load impedance adjustment
Theoretically, efficiency can be increased at low power level if the RF swing occupies a larger portion of the device’s load line. One major approach to accomplish this is by applying switched gain stage or stage bypassing. For example, a concept topology is shown in Figure 3 where the second stage of the power amplification chain is bypassed. At low power level, all signal amplification can be achieved with Q1 and the RF signal is routed from the first stage to the output (in bypass mode) and VG2 is set to pinch off, hence Idd2 is zero. At higher power level, the amplifier operates with both stages.
Circuit architectures with varying levels of complexity are possible in realizing a stage bypassing power amplifier. Many choices are possible with respect to placement of RF switches. Basically, RF switches are needed to bypass Q2 and an additional matching circuitry is required to provide desired Q1 load line in the bypass mode.
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Figure 3: Stage bypassing power amplifier method
Invention
The new method proposes to control the load impedance for wider dynamic range of power level with simple impedance tuning (load modulation) technique in stage bypassing scheme. The impedance tuning requires an external bias voltage. The bias voltage is varied to adjust the PA optimum load impedance. The first component to the PA will give significant changes to the load impedance. This method required a switchin...
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